The MicroBlazeⁱ is a 32-bit soft-processorⁱ developed and marketed by Xilinxⁱ, Inc. for use in their FPGAⁱ and CPLDⁱ products. This processor is a RISC machine modeled after the DLXⁱ processor architecture introduced in Henessy and Patterson's computer architecture book. Before introducing basic assembly programming for the MicroBlazeⁱ architecture we will first look at the basic architecture of the MicroBlazeⁱ as well as the MicroBlazeⁱ ABI conventions. It is important to understand these concepts as they lie at the heart of assembly programming. Most of the information presented in this tutorial is covered in detail in the MicroBlaze Reference.

MicroBlazeⁱ Architecture

The MicroBlazeⁱ processor is a fairly standard 32-bit RISC machine. It contains 32 general purpose registers, named R0 through R31, address and data buses for connection to other devices, optional instruction and data caches, and a host of other standard components. The processor is implemented as a single issue, 3 or 5 stage pipelined processor which operates on 32-bit instructions with three operands and two addressing modes.

The data types supported by the MicroBlazeⁱ processor are shown in figure 1. The MicroBlazeⁱ is a big-endian processor, thus, byte 0 is always the most significant byte (MSB). All of the registers in the processor use the 32-bit word data type. When working with half-word data types, each register can be viewed at two 16-bit halves. Most operations which load 16-bits of data into a register clear byte and byte 1 to zero and place the contents of the half-word value into byte 2 and byte 3. Likewise, when working with the byte data type, bytes 0, 1, and 2 are cleared to zero and the byte value is placed into byte 3 of the register.

The instruction types supported by the MicroBlazeⁱ processor are shown in figure 2. The MicroBlazeⁱ uses a 3 operand instruction format for all of its instructions, as is standard for RISC machines. Instructions which are encoded using the 3 operand format have an opcode field which identifies the instruction to execute and 3 operand fields which provide data for the instruction. The MicroBlazeⁱ, along with many other RISC machine, partitions instructions into Type A instructions and Type B instructions. Type A instructions are register-to-register instructions, meaning all data for the instruction comes from the processor's register file. Type B instructions are immediate instructions. This format encodes data "immediately" into the instruction itself in the form of an immediate field which contains a half-word data type.

MicroBlazeⁱ ABI Conventions

The MicroBlazeⁱ processors provides 32 general purpose registers which can be used with any instruction for any purpose (with the exception of R0 which shouldn't ever be used as a destination register). However, to ease interoperability between different pieces of software, following ABI usage conventions is recommended. These conventions, while not required or enforced by the hardware, specify a standard way of programming the MicroBlazeⁱ processor.

The first ABI specification gives roles to each of the 32 general purpose registers. There are three different classes of registers in the register conventions show below. Dedicated registers maintain values which are used as part of the whole program. For instance, register 1 is the stack pointer which is used by the entire program. Volatile registers are used to store temporary values which do not need to be saved for later usage. These registers are also known as caller-saved registers because a function must save their values, if necessary, before calling another function. Non-volatile registers are the opposite of volatile registers; they store durable values. Non-volatile registers are also known as callee-saved registers because a function must save the original value to memory before making use of the register. The register usage conventions are:

1. Register 0: Zero Register, Dedicated
   Register 0 is a special register which always contains the value 0. Unlike the other register usage conventions, this convention is enforced by the hardware itself. The value 0 is often used in arithmetic instructions to load constant values into registers and is common as the base address for use with memory access instructions.
2. Register 1: Stack Pointer, Dedicated
   Register 1 contains a pointer to the top of the stack. The stack itself is used in subroutines to save register contents and store parameters if needed. Their are no special instructions for stack manipulation in a RISC machines so all stack manipulations must be done manually using the processors support for arithmetic and memory access.
3. Register 2: R/O Small Data, Dedicated
   The read-only small data register stores the base address of an area in memory which contains data for use by the program. This is used primarily to ease loading data into the processor using the load-word immediate instruction. This instruction uses a 16-bit offset from a base address to access memory. The read-only small data register is used as the base address with the 16-bit offset providing upto 64KB of addressable data from the base address.
4. Registers 3-4: Return Values, Volatile
   Return values from subroutines are placed into registers 3 and 4 by the callee for return to the caller. When returning 32-bits of data or less only register 3 is loaded with the return value. When returning between 33-bits and 64-bits of data register 4 is used as well. If a subroutine needs to return more than 64-bits of data then the value must be place in memory and a pointer to that value should be loaded into register 3.
5. Registers 5-10: Parameter Passing / Temporary Values, Volatile
   When performing subroutine calls the first six parameters of 32-bits or less are places in registers 5 through 10 by the caller for the callee. This convention gives the callee function fast and easy access to parameters.
   
6. Registers R11-R12: Temporary Values, Volatile
   Temporary values produced by a program are stored in volatile registers which do not need to be saved by a subroutine callee before use. This eases the demand placed on the stack because some most temporary values will never need to be saved to the stack during a subroutine invocation.
7. Register 13: R/W Small Data, Dedicated
   Like the read-only small data register, the read-write small data register provides access to an area of memory for use by the program. It is used just like the read-only small data register except for the store-word instruction can also be used to change the contents of the memory location.
8. Register 14: Return Address for Interrupt, Dedicated
   When an interrupt occurs the processor must halt what it is currently doing and perform an interrupt service routine. When this occurs the processor places the address of the instruction to return to after the interrupt service routine has completed in register 14.
   
9. Register 15: Return Address for Subroutine, Dedicated
   When one subroutine invokes another subroutine the program must store the return address so that the callee subroutine can return to the caller subroutine. Register 15 is used for this purpose. It is important that register 15 is not used as a stack, meaning that register 15 must be explicitly saved to the stack by the programmer if multiple levels of subroutine invocation are used.
10. Register 16: Return Address for Debug, Dedicated
    Similar to the return address for interrupt register, the return address for debug register stores the return address to the program when a debug exception occurs. When the debugging routine finishes it returns to the address that was stored.
11. Register 17: Return Address for Exceptions, Dedicated
    Exceptions are like interrupts in that the processor halts what it is doing in order to do something else temporarily. Like the return address for interrupt, the return address for exceptions is used to store the address where the program was interrupted.
    
12. Register 18: Reserved, Dedicated
    This register is reserved for use by compilers and should not be used by programmers directly. Compilers can make use of this register however they see fit.
13. Registers 19-31: General Purpose, Non-volatile
    The remaining registers provided by the MicroBlazeⁱ are all non-volatile registers which have no specific role assigned. These registers can be used for any purpose by the programmer. The only convention is that non-volatile registers are callee save registers so the callee must maintain the value of the register across subroutine invocations.

Assembly Programming for the MicroBlazeⁱ

Assembly programming for the MicroBlazeⁱ is done using the GNU AS assembler. This assembler provides sophisticated support for laying out instructions and data in memory for execution on the processor. For instance, the following shows a simple program which places instructions for executing and infinite loop in memory along with directives for placing a constant string value in memory:

loop:
    bri     loop

    .data
    .align 2
UNUSED_STRING:
    .asciz "This is a null-terminated string"

Using the GNU AS assembler to its full capacity requires creating a file with the extension ".S", it is important that the S in the extension be capitalized. Using this file extension and then compiling with gcc as you would with a C file will compile the file using GNU AS while also giving access to C preprocessor functionality which can be used to declare C style constants and macros. More information about MicroBlazeⁱ assembly programming can be found by reading the other tutorials on the MicroBlaze Tutorials Page.