In laboratory 2 you will design a system-on-chipi which includes one Microblaze soft-processori and several General Purpose I/O peripherals (GPIOs). Just like laboratory 1, the system-on-chipi will be created using the Base System Builder supplied by the Xilinxi tool suite. Once your system-on-chipi has been created, you will write a custom software application to take input from the push button and produce output on the LEDs. In order to complete this laboratory successfully, you will need to understand the workings of the GPIOi peripheral by reading the GPIOi reference manual which can be found in the references section.
This project will be a due during the week of September 8, 2008 through September 12, 2008. Please allocate enough time outside of class to read and understand the project and the workings of the GPIOi.
Before proceeding with this laboratory please read at least the OPB GPIOi Registers and OPB GPIOi Operation sections of the GPIOi reference manual. In future labs is will be your responsibility to implement application software to control an FPGAi peripheral. In this lab you will be expected to understand how the provided software application implements the operational specification provided by the reference manual.
For this laboratory you will be creating a system-on-chipi design, containing the peripherals mentioned above, using the BSB as described in laboratory 1. Once you have the system-on-chipi design created you will need to create a new software application named "lab2" which contains one source code file named "lab2.c". After this, copy and paste the source code template into your source file.
Read the comments in the source code template and try to understand how the source code provided implements the GPIOi hardware protocol described in the GPIOi reference manual. Once you understand what the source code template is doing, modify the main function to implement the project requirements described in the project assignment given above.
Answers to the questions for this laboratory can be found in either the Memory-Mapped I/O Tutorial or the GPIO reference manual.